Design re-spins are bad. They cost money, they delay the product, and they force the group responsible to revisit a project that they thought was complete. No one wants a re-spin.
One way to reduce re-spins is to build more margin into the design. More margin means more flexibility to handle process variations, more tolerance for unexpected conditions in other parts of the design.
Unfortunately, as Cadence VP Steve Carlson points out, all that margin erodes product performance and, ultimately, boosts development costs. Oops!
Friday, August 3, 2007
Time for designers to tighten up?
Posted by Katherine Derbyshire at 6:04 AM
Labels: "circuit design", semiconductors
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